The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 10, 1991

Filed:

Mar. 15, 1990
Applicant:
Inventors:

Robert Daigle, Sterling, CT (US);

Samuel Malbaurn, Dayville, CT (US);

David Noddin, Eau Claire, WI (US);

Assignee:

Rogers Corporation, Rogers, CT (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H05K / ;
U.S. Cl.
CPC ...
29830 ; 29739 ; 29848 ; 361412 ; 428422 ;
Abstract

Methods of fabricating multilayer circuits are presented. In accordance with the present invention, a plurality of circuit layers comprised of a dielectric substrate having a circuit formed thereon are stacked, one on top of the other. The dielectric substrate is composed of a polymeric material capable of undergoing fusion bonding such as a fluoropolymeric based substrate. Fusible conductive bonding material (e.g. solder) is applied on selected exposed circuit traces (prior to the stacking step) whereupon the entire stack-up is subjected to lamination under heat and pressure to simultaneously fuse all of the substrate and conductive layers together to form an integral multilayer circuit having solid conductive interconnects.


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