The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 09, 1991

Filed:

May. 27, 1988
Applicant:
Inventors:

Daisuke Kosaka, Takarazuka, JP;

Yoshinori Ueda, Osaka, JP;

Tetsuo Hikawa, Takarazuka, JP;

Masami Nishikawa, Takatsuki, JP;

Assignee:

Ricoh Company, Ltd., Tokyo, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L / ;
U.S. Cl.
CPC ...
357 43 ; 357 35 ; 357 44 ; 357 48 ;
Abstract

A method for manufacturing a Bi-CMOS device by preparing both of bipolar and MOS standard cells in a library is provided. A substrate of a first conductivity type is provided and a plurality of buried layers of a second conductivity type are formed on selected locations of the substrate. Then an epitaxial layer of the first conductivity type is formed on the substrate covering the buried layers. Then a plurality of wells of the second conductivity type are formed in the epitaxial layer such that each of the wells extends through the epitaxial layer from the top surface to at least a portion of the corresponding buried layer to thereby define a plurality of electrically isolated islands in the epitaxial layer. Then a bipolar transistor is formed in at least one of the islands with a MOS transistor formed in at least another of the islands.


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