Lateral transistor separated from substrate by intersecting slots filled

Abstract

The invention is a transistor or array thereof and method for producing same in VLSI dimensions on a silicon substrate doped P or N type by forming intersecting slots in spaced apart relation across the substrate to define semi-arrays of V shaped intermediate regions which will become transistors. Silicon oxide fills these slots and separates the transistor regions from the substrate. Orthogonal slots divided the semi-arrays into individual transistor active regions which are doped by one of N or P doping introduced into each active regions via the orthogonal slots and driven in to comprise the emitter and collector regions on respective sides of original substrate comprising the base regions. Metallization patterns complete electrical connections to the emitter base and collector regions and silicon oxide substantially covers the periphery of each active region for total isolation. Each transistor may further comprise a doped region called P or N doping extending into and across the top of the base region underneath the interconnect metallization to reduce space region contact resistance and to provide an electron reflecting potential barrier. Each transistor may further comprise a doped skin of either P or N doping to force electrons toward the center of the base region.