The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 09, 1991

Filed:

Jun. 09, 1989
Applicant:
Inventors:

Zahra H Amini, Cupertino, CA (US);

Ian S Latchford, Cupertino, CA (US);

Assignee:

Applied Materials, Inc., Santa Clara, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L / ;
U.S. Cl.
CPC ...
437233 ; 437228 ; 148D / ;
Abstract

The invention comprises an improvement in the process wherein a polysilicon layer, which is formed over a step on an integrated circuit structure and masked with a photoresist, is anisotropically etched to remove the exposed portions of the polysilicon layer leaving residues of polysilicon adjacent to the step and residues of a polymerized silicon/oxide-containing material adjacent the sidewalls of the masked portions of the polysilicon layer. The improvement comprises treating the integrated circuit substrate with a dilute hydroxide solution to remove both the polysilicon residues and the residues of polymerized silicon/oxide-containing material.


Find Patent Forward Citations

Amini, Zahra. (1991). Process for etching polysilicon layer in formation of integrated circuit (U.S. Patent No. 5030590). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/5030590

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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