The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 02, 1991
Filed:
May. 18, 1990
Hernan A Castro, Shingle Springs, CA (US);
Mark A Holler, Palo Alto, CA (US);
Intel Corporation, Santa Clara, CA (US);
Abstract
The present invention covers a synapse cell for providing a weighted connection between a differential input voltage and a single output summing line having an associated capacitance. The connection is made using one or more floating-gate transistors which provide both excitatory as well as inhibitory connections. As configured, each transistor's drain is coupled to an input line and its source is coupled to the output summing line. The floating-gate of the transistor is used for storing a charge which corresponds to the strength or weight of the neural connection. When a voltage pulse having a certain duration is applied to the control gate of the floating-gate transistor, a current is generated which acts to discharge the capacitance associated with the output summing line. The current is directly proportional to the charge stored on the floating-gate member and the duration of the input pulse.