The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 25, 1991

Filed:

Feb. 12, 1990
Applicant:
Inventors:

Kazutoshi Ikegaya, Sagamihara, JP;

Yuji Maruyama, Tokyo, JP;

Kunjo Sannomiya, Atsugi, JP;

Yukifumi Tsuda, Kawasaki, JP;

Hiroto Toba, Yokohama, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06K / ;
U.S. Cl.
CPC ...
382-8 ; 382 18 ; 382 51 ; 358101 ; 250562 ;
Abstract

A printed-circuit board inspection apparatus for checking the condition of each circuit component mounted by soldering on a printed-circuit board is disclosed in which a luminance signal obtained from the reflected light scattering from the printed-circuit board being illuminated is converted through a given threshold level to binary signals, then the binary signals and mask data are processed to calculate the ratio of an area represented by the number of binary '1' signals to an area represented by the number of binary '0' signals, and the soldering condition of the component is judged based on the area ratio. With this arrangement, the inspection is not negatively influenced by the misalignment of the component with a mating soldering land, is capable of judging the amount of solder, and can be performed automatically and efficiently. The binary signals may be converted into code data by assigning a code '1' or '0' to each of a plurality of split masks set on each soldering land, depending on the largeness of the area in which the number of binary '1' signals '1' is larger than the number of binary '0' signals or vice versa. In this case, the judgment of the soldering condition is made by comparing the code data with code patterns contained in a predetermined code table.


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