The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 14, 1991
Filed:
Feb. 15, 1990
Werner O Haug, Boeblingen, DE;
Erich Klink, Schoenaich, DE;
Karl E Kroll, Altdorf, DE;
Thomas Ludwig, Sindelfingen, DE;
Helmut Schettler, Dettenhausen, DE;
Rainer Stahl, Schonaich, DE;
Otto M Wagner, Altdorf, DE;
International Business Machines Corporation, Armonk, NY (US);
Abstract
Integrated circuit package comprising a power supply distribution wiring and a chip interconnection signal wiring both formed on the top surface of a passive semiconductor interconnection carrier (2) in which a power supply decoupling capacitor is implemented. Spaced wells (4) of a first conductivity type are provided in the surface of said carrier of a second conductivity type. The power supply distribution wiring comprises first and second conductive lines (5,6) within a first wiring level (WL1). Said first conductive lines (5) are deposited on the surface areas of said wells (4) in an ohmic contact relationship and said second conductive lines (6) are deposited on the surface areas of said carrier (2) between said wells (4) in an ohmic contact relationship. Said first and second conductive lines are connected to first second terminals of the power supply, respectively, so that the junction capacitance between said wells (4) and the carrier material (2) embedding said wells forms said decoupling capacitor. At least one active integrated circuit chip (1) is mounted and electrically connected to the passive semiconductor interconnection carrier (2).