The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 09, 1991

Filed:

Apr. 27, 1990
Applicant:
Inventors:

Reza Kazerounian, Alameda, CA (US);

Syed Ali, Cupertino, CA (US);

Boaz Eitan, Sunnyvale, CA (US);

Assignee:

WaferScale Integration Inc., Fremont, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H02M / ;
U.S. Cl.
CPC ...
363 60 ; 363 68 ; 323281 ; 357 51 ;
Abstract

An EEPROM constructed in accordance with our invention includes a voltage multiplier for generating an erase voltage and a voltage regulator circuit for controlling the magnitude of the erase voltage. The voltage regulator circuit includes means for providing a first voltage proportional to the erase voltage, means for providing a reference voltage on a reference voltage lead, and means for controlling the voltage multiplier circuit so that if the first voltage is less than the reference voltage, the voltage multiplier circuit will increase the erase voltage, but if the first voltage is greater than the reference voltage, the voltage multiplier will not continue to increase the erase voltage. The voltage multiplier includes novel capacitors and transistors constructed using standard EEPROM processing to withstand high voltages without breaking down.


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