The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 08, 1991

Filed:

Oct. 20, 1986
Applicant:
Inventors:

Nicky C Lu, Yorktown Heights, NY (US);

Brian J Machesney, Burlington, VT (US);

Rick L Mohler, Williston, VT (US);

Glen L Miles, South Burlington, VT (US);

Chung-Yu Ting, Katonah, NY (US);

Stephen D Warley, Burlington, VT (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L / ;
U.S. Cl.
CPC ...
437200 ; 437 41 ; 437 52 ; 437 59 ; 437919 ; 148D / ; 148D / ;
Abstract

A method of forming a bridge contact between a source diffusion region of a transfer gate FET and a polysilicon-filled trench storage capacitor electrodes of the FET. A layer of titanium is evaporated at a temperature of approximately 370.degree. C., so that the titanium has a substantially columnar grain structure and a minimum of matrix material. The bottom portions of the columnar grains have a lateral length that approximates the lateral length of the dielectric separating the source diffusion from the poly-filled trench. Thus, upon sintering at 700.degree. C. in an N.sub.2 atmosphere, titanium silicide will form over all exposed silicon regions as well as the dielectric, without shorting the FET electrodes together.


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