The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 25, 1990
Filed:
Nov. 08, 1988
Applicant:
Inventor:
Richard C Foss, Calabogie, CA;
Assignee:
Mosaid, Inc., , CA;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C / ; G11C / ;
U.S. Cl.
CPC ...
365203 ; 365149 ; 365208 ; 365222 ;
Abstract
A folded bitline dynamic RAM circuit with reduced shared supply voltages comprised of circuitry for applying full logic high and low supply voltages to respective bitlines during successive active cycles of the RAM circuit, and circuitry for applying reduced supply voltages to the bitlines during successive precharge cycles. By applying reduced supply voltages to the bitlines during the precharge cycles voltage stress on cell access transistors and sense amplifiers of the RAM circuit are reduced. The time required to share the charge residing on the bitline halves at the start of the active cycle is also reduced.