The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 13, 1990

Filed:

Jun. 30, 1989
Applicant:
Inventors:

Takao Hiraguchi, Mizusawa, JP;

Kazunori Imaoka, Komae, JP;

Assignee:

Fujitsu Limited, Kawasaki, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L / ; H01L / ; H01L / ; H01L / ;
U.S. Cl.
CPC ...
357 42 ; 357 41 ; 357 59 ; 357 64 ; 357 231 ;
Abstract

The present invention relates to semiconductor device, a e.g., a CMOS, comprising a denuded region and a bulk-defect region, as well as the process for producing, e.g., a CMOS. In a conventional CMOS, the distance (dp) between the bulk-defect region and P.sup.+ -type source of drain region--(dp)--is greater than the distance (dn) between the bulk--defect--region and the P well--(dn)--. As a result, a leakage current can be generated in the PN junction. In order to eliminate the problems caused due to dp>dn, the present invention forms in a--semiconductor-substrate a bulk-defect region having a depth which is nonuniform in accordance with the nonuniform depth of the semiconductor elements.


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