The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 03, 1990

Filed:

Apr. 01, 1986
Applicant:
Inventors:

Donelli J DiMaria, Ossining, NY (US);

David W Dong, Peekskill, NY (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L / ; H01L / ; H01L / ;
U.S. Cl.
CPC ...
357 235 ; 357-6 ; 357 2315 ; 357 54 ;
Abstract

The present invention relates to DEIS (Dual Electron Injector Structure) EAROM (Electrically Alterable Read Only Memory) devices which utilize a silicon-rich, silicon dioxide insulator between injectors which has an excess of silicon therein which is less than the excess of silicon in the silicon rich, silicon dioxide injectors. The device does not depart in any way from known DEIS EAROM devices except that the insulator layer between the injectors is rendered conductive to a desired degree by causing a compound insulator like SiO.sub.2 to be off-stoichiometry during deposition so that the resulting insulator becomes silicon rich. Alternatively, the insulator may be deposited together with another metal which renders the insulator conductive or a metallic specie may be added to the insulator by diffusion or ion implantation after the insulator is formed. The resulting conductive insulator provides a means for draining off trapped charge in the insulator resulting in a device of such improved cyclibility that the DEIS EAROM can be used as a Non-Volatile Random Access Memory (NVRAM) capable of from 10.sup.8 to greater than 10.sup.10 cycles before threshold collapse occurs. The conductive insulator is designed so that it is conductive only at high electric fields encountered during writing and erasing and highly blocking at low fields encountered during reading or storage operations.


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