The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 26, 1990
Filed:
Sep. 30, 1988
Katsuya Okumura, Yokohama, JP;
Toshinori Shinki, Tokyo, JP;
Toshiaki Idaka, Yokohama, JP;
Riichirou Aoki, Kitakami, JP;
Kabushiki Kaisha Toshiba, Kawasaki, JP;
Abstract
A semiconductor device and a method of manufacturing the same wherein first and second wirings with an interlayer insulating film interposed therebetween are connected through a contact hole formed in the interlayer insulating film. In the semiconductor device, the first and second wirings are connected via a low resistive, conductive metal layer obtained by reducing a highly resistive oxide layer with a highly oxidizing metal, the highly resistive oxide layer being exposed within the contact hole on the surface of the first wiring. In the method of manufacturing a semiconductor device, a contact hole is opened in the interlayer insulation on the first wiring, a highly oxidizing metal is deposited on the highly resistive oxide layer on the surface of the first wiring within the contact hole, and the highly resistive oxide layer is reduced with the highly oxidizing metal to change the highly resistive oxide layer to a low resistive, conductive metal layer. The second wiring is connected to the first wiring via the conductive metal layer. The reduction may be carried out before or after depositing the second wiring, or at the time when the highly oxidizing metal is deposited.