The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 06, 1990
Filed:
Dec. 21, 1988
Manabu Gotoh, Yokohama, JP;
Ushio Denki, Tokyo, JP;
Abstract
A method of exposing a peripheral part of wafer is used for a fine pattern formation process in the processing of ICs, LSIs and other electronics elements, to remove, in a development step, an unncessary portion of a photoresist coated on a semiconductor substrate, typically a silicon wafer, or a substrate consisting of a dielectric, a metal or an insulator, from a peripheral part of the substrate. In the method for exposing a peripheral part of wafer, the wafer edge is detected using a sensor, and the light emission end of an optical fiber lightguide is controlled to expose a fixed distance from the edge of wafer according to a signal from the sensor. It is thus possible to expose a peripheral part of wafer having a predetermined width with high accuracy. In addition, the wafer centering mechanism and orientation flat detection/positioning mechanism employed in the prior art are unncessary. It is thus possible to provide a method exposing a peripheral part of wafer which can greatly reduce the processing time and has extremely high accuracy and efficiency.