The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 09, 1990

Filed:

Nov. 21, 1988
Applicant:
Inventors:

Thomas J Dunaway, St. Louis Park, MN (US);

Richard K Speilberger, Maple Grove, MN (US);

Jerald M Loy, Anoka, MN (US);

Lori A Dicks, New Hope, MN (US);

Luverne O Balgaard, Burnsville, MN (US);

Assignee:

Honeywell Inc., Minneapolis, MN (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
B23K / ; B23K / ;
U.S. Cl.
CPC ...
2281802 ; 228212 ; 228242 ; 228-62 ; 228 447 ; 228243 ; 269903 ; 269 21 ;
Abstract

Disclosed is a system and method for controlled compression furnace bonding of a semiconductor chip to conductive elements of a leadframe. The system comprises a holding member having a chip support surface for supporting a semiconductor chip and a positioning system for precisely positioning conductive elements of a leadframe with corresponding bonding locations on the semiconductor chip. A furnace heating system comprising a furnace is employed for heating and bonding the conductive elements to the chip bonding locations. The method invention comprises positioning a semiconductor chip comprising a plurality of bonding locations in a holding member with a chip support surface; providing performed bonding material for connecting conductive elements of a leadframe with the chip bonding locations; aligning the conductive elements of a leadframe with corresponding bonding locations on the semiconductor chip; moving the leadframe conductive elements toward the chip bonding locations so that the bonding material is aligned with the conductive elements in the chip bonding locations; furnace bond heating the bonding material to a point of reflow; and cooling the bonding material to complete the bonding process between the leadframe conductive elements and the corresponding chip bonding locations.


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