The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 26, 1989

Filed:

Dec. 27, 1988
Applicant:
Inventors:

Byung-Youn Kim, Seoul, KR;

Yong-Bo Park, Busan, KR;

Tae-Sung Jung, Kyounggi-do, KR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G05F / ;
U.S. Cl.
CPC ...
323313 ; 323316 ; 323317 ; 307475 ; 307585 ;
Abstract

A CMOS input buffer for converting the TTL level signals to the CMOS level signals, thereby being capable of stably operating within all allowable range of the power supply voltage, is disclosed. Said CMOS input buffer includes an inverter, a reference voltage generating circuit, a power supply voltage tracer circuit and an input circuit. The input circuit includes P-channel MOS transistors and N-channel MOS transistors so as to supply a stable logic output in response to the input signal of TTL level, regardless of variation of the power supply voltage Vcc, under the control of a voltage that is approximately proportional to the difference between the reference voltage and the power supply voltage within a fixed range of the power supply voltage.


Find Patent Forward Citations

Kim, Byung-Youn. (1989). Cmos input buffer stable for the variation of a power supplying voltage (U.S. Patent No. 4890051). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/4890051

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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