The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 31, 1989
Filed:
Dec. 09, 1988
Mishio Hayashi, Saitama, JP;
Advantest Corporation, Tokyo, JP;
Abstract
A clock regenerator generates a clock Co synchronized with an input data pattern and a data pattern generator generates a reference data pattern in synchronization with the clock Co. The reference data pattern and the input data pattern are compared by a data disagreement detector to detect disagreement therebetween. The disagreement detection signal thus obtained is frequency divided by a 1/m-frequency divider and its frequency-divided output is further frequency divided by a 1/-n frequency divider. The frequency-divided output of the 1/n-frequency divider is provided to a bistable flip-flop, placing it in one stable state. The logical sum of the output of the flip-flop in the one stable state and the 1/m-frequency divider is obtained, as an inhibit pulse, by an AND gate, and the inhibit pulse is applied to another AND gate to inhibit the passage therethrough of the clock Co to the data pattern generator, delaying the generation of the reference data pattern in the data pattern generator. The 1/m-frequency divider, the 1/n-frequency divider and the flip-flop are reset every k pulses of the clock Co.