The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 26, 1989
Filed:
Sep. 16, 1987
Applicant:
Inventors:
Masao Nakano, Kasugai, JP;
Tsuyoshi Ohira, Kawasaki, JP;
Hirohiko Mochizuki, Kawasaki, JP;
Yukinori Kodama, Yokohama, JP;
Hidenori Nomura, Yokohama, JP;
Assignees:
Fujitsu Limited, Kawasaki, JP;
Fujitsu Vlsi Limited, Kasugai, JP;
Primary Examiner:
Int. Cl.
CPC ...
G11C / ; G11C / ;
U.S. Cl.
CPC ...
365190 ; 36518901 ; 36523006 ;
Abstract
A semiconductor memory device comprises a plurality of reset circuits connected to a data bus pair at different locations. Before each read operation, the reset circuits reset the data bus pair to a predetermined reset voltage. The resetting of the data bus pair is virtually unaffected by the distributed resistances and parasitic capacitances of the data bus pair, since the resetting is carried out at a plurality of locations on the data bus pair.