The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 26, 1989

Filed:

Mar. 03, 1988
Applicant:
Inventors:

Omer Kal, Istanbul, TR;

John H Hall, San Jose, CA (US);

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03M / ;
U.S. Cl.
CPC ...
341133 ; 341172 ;
Abstract

A CMOS analog to digital flash converter cell includes an input for receiving an analog signal to be converted to a digital value, a predetermined connection to a resistance ladder for providing a reference voltage, an output, CMOS comparator/inverter stage having drain connections commonly connected to the output, a level shift capacitor connected to input gate connections of the comparator/inverter stage, and three bi-phase clocked CMOS switches: a first switch for connecting the reference voltage to one side of the level shift capacitor during a first phase of a clock period; a second switch for connecting the output to the input gate connections on the other side of the level shift capacitor during the first phase of the clock period, and a third switch for connecting the input voltage to the one side of the level shift capacitor during a second phase of the clock period. The new input circuit includes a first bipolar transistor having a base connection to the predetermined resistance ladder connection and having an output node connected to the first CMOS switch and a second bipolar transistor having a base connection connected to the input and having an output node connected to the third CMOS switch.


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