Wafer flatness station

Abstract

An automatic wafer flatness station is disclosed for obtaining a flatness profile of a semiconductor wafer or other sample from thickness data. The sample to be flatness profiled is supported so that it maintains its natural shape. A processor coupled to a capacitive thickness sensing head and to the support medium is operative to successively position each of a plurality of preselected points of the sample into proximity with the capacitive thickness sensing head for measuring the thickness of the sample at the corresponding point. An analog-to-digital converter converts the thickness measurement into data that is stored in a data table in system memory, the individual addresses of which correspond to the spacial location on the sample of each such preselected point. The processor is operative after the data table is compiled for each sample to compute the flatness profile of one surface therefrom relative to a selectable plane. That plane typically maps the other surface of the sample into a plane, for example, simulating the condition where the sample is held in an ideal vacuum chuck for semiconductor processing at which point surface flatness is needed. Other planes may be defined by least squares analysis and 3-point techniques, among others.