The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 22, 1989
Filed:
Dec. 17, 1987
Yoichi Murayama, Tokyo, JP;
NEC Corporation, Tokyo, JP;
Abstract
Disclosed is a levelshift circuit comprising a P-channel MOS transistor wherein the source is connected to a high power potential in a low-voltage power circuit, a first N-channel double-diffused field effect transistor wherein the source is connected to a ground potential and the gate and drain are shorted with each other and connected to the drain of the P-channel MOS transistor, a second N-channel double-diffused field effect transistor wherein the structure is the same as that of the first N-channel double-diffused field effect transistor or different only in its gate width at a predetermined ratio from that of the first N-channel double-diffused field effect transistor, the source is connected to the ground potential and the gate is connected to the gate and drain of the second N-channel double-diffused field effect transistor, a PNP transistor wherein the emitter is connected to the high power potential in the high-voltage power circuit, the base is connected to the drain of the second N-channel double-diffused transistor and the collector is connected to a load, and a switch whereby the gate and drain of the first N-channel double-diffused field effect transistor is short-circuited or opened with respect to the ground potential.