The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 25, 1989
Filed:
Jun. 29, 1987
John P Short, Indian Harbour Beach, FL (US);
George V Rouse, Melbourne, FL (US);
Harris Corporation, Melbourne, FL (US);
Abstract
A method of forming a high quality dielectrically isolated silicon on insulator semiconductor device using a double wafer bonding process. As a result of the double wafer bonding process, the invention significantly reduces the device limitations presently known with dielectric isolation and silicon on insulator structures. The present invention specifically eliminates the need for grinding or polishing the final surface which the devices will be implemented in, thereby eliminating the adverse effects which these mechanical processes impute onto these surfaces. Additionally, the present invention eliminates the need for a thick polycrystalline deposition for the production of the dielectric isolation, thereby eliminating the adverse effects of single crystal bulk defects and the loss of tolerance control due to warpage which would otherwise occur in a dielectric isolated process. Also as a result of the double bonding process, tighter tolerances and more precisely positioned final islands are achieved, thereby allowing for more densely packed or smaller circuits for a given application.