The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 20, 1989
Filed:
Feb. 17, 1988
Jerry A Kreifels, Citrus Heights, CA (US);
George Hoekstra, Santa Clara, CA (US);
Intel Corporation, Santa Clara, CA (US);
Abstract
A circuit and method for verifying leakage in a flash EPROM/EEPROM memory cell which is fabricated on a silicon substrate having floating gate. A word line coupled to the control gate of the memory cell is typically at ground potential, but during a test mode a positive voltage is placed on the control gate and leakage current at the drain is measured. A good cell will typically have zero or negligible drain leakage current, however, a cell which is susceptible to being overerased will exhibit appreciable leakage current. A circuit is implemented on the chip with the memory for switching a positive voltage onto the word line during the test mode.