The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 25, 1989

Filed:

Jun. 01, 1987
Applicant:
Inventor:

I-Fay F Wang, Richardson, TX (US);

Assignee:
Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G05F / ; H03K / ;
U.S. Cl.
CPC ...
323314 ; 323274 ; 3072962 ;
Abstract

A substrate bias voltage regulator (10) is disclosed having a voltage divider (22) for generating a reference voltage, a low gain stage (24) for developing a drive voltage independent of the supply voltage (V.sub.cc) and for driving a current source/mirror circuit (26). The current source/mirror circuit (26) operates in conjunction with a current sink circuit (30) for providing a logic output of the regulator (10) for controlling a substrate charge pump circuit (18). Connected to the current sink circuit (30) is a compensation circuit (32) for adjusting the drive to the current sink circuit (30) in response to transistor threshold voltage and temperature considerations.


Find Patent Forward Citations

Wang, I-Fay. (1989). Cmos substrate charge pump voltage regulator (U.S. Patent No. 4825142). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/4825142

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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