The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 06, 1988

Filed:

Jul. 02, 1987
Applicant:
Inventor:

Richard F Herlein, San Jose, CA (US);

Assignee:
Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03K / ; G06K / ;
U.S. Cl.
CPC ...
328 72 ; 328 55 ; 328 63 ; 307269 ; 307590 ; 371-1 ;
Abstract

A system which enables signals to be supplied at precisely desired times in an automatic test system. The apparatus includes a base delay memory which stores information related to a base time delay, while a vernier memory stores information relating to timing corrections to be made to the base time delay. The base delay memory controls a counter while the correction memory controls a vernier deskew apparatus for further delaying the output signal from the counter. To prevent carries from the vernier memory from influencing the base delay memory, the most significant bit of the vernier memory is of the same significance as the least significant bit of the base delay memory. The most significant bit of the vernier memory is also connected to drive the counter, in effect providing the counter with two least significant bits, and enabling a single base delay memory to control more than one signal timing paths.


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