The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 06, 1988

Filed:

Nov. 02, 1987
Applicant:
Inventor:

Keith A Taylor, Portland, OR (US);

Assignee:

Tektronix, Inc., Beaverton, OR (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G05F / ;
U.S. Cl.
CPC ...
323315 ; 323316 ;
Abstract

A differential signal input is applied through two resistors to the two sides of a dual clamping circuit and the two current outputs of a current mirror. The dual clamping circuit prevents the voltage on either output of the current mirror from going above some reference value in response to the imbalance created by the differential input signal. With one side, the high side, of the differential signal output held to this reference value by the operation of the clamping transistor on that side, the whole voltage imbalance on the input appears on the other output as a result of the operation of the current mirror. Thus, the reference level of the differential signal is shifted at the output, while the amplitude of the signal is preserved. Alternative embodiments substitute a dual clamping circuit with an opposite polarity or an averaging circuit for the dual clamping circuit described, thereby referencing the output signal to the low side or an average instead of the high side as in the preferred embodiment.


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