Interleaved digitizer array with calibrated sample timing

Abstract

A digitizer system includes M digitizers, each producing a separate waveform data sequence representing a succession of instantaneous magnitudes of an input signal at sample times determined by a periodic clock signal. Transmission of the clock signal to each digitizer is delayed by a corresponding adjustable delay time so as to control the relative sample timing of the digitizers. To adjust sample timing, a sine wave signal is applied as the input signal to each digitizer such that the M digitizers produce M separate waveform data sequences in response to said input signal and the M data sequences are interleaved and windowed to form a single waveform data sequence. A first sequence of complex numbers representing a discrete Fourier transform of the single waveform data sequence is generated and then a second sequence of M complex numbers is formed from elements corresponding to relative magnitude peaks of the first sequence. A third sequence of M complex numbers is generated representing an inverse discrete Fourier transform of the second sequence and the phase angle of each number of the third sequence is computed and divided by the input signal frequency to produce a set of M numbers, each representing a timing error for a corresponding one of the M digitizers. The time delay corresponding to each digitizer is then adjusted by the amount of the timing error.