The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 22, 1988

Filed:

Jul. 18, 1986
Applicant:
Inventor:

Einar O Traa, Portland, OR (US);

Assignee:

Tektronix, Inc., Beaverton, OR (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H03M / ;
U.S. Cl.
CPC ...
3403 / ; 3403 / ; 3403 / ; 377 70 ; 377 75 ;
Abstract

A combined digital-to-analog converter and latch memory circuit (10) includes an R-2R resistive ladder network (12) and a current-controlled latch memory 18. The R-2R resistive ladder network has plural input nodes (100 and 102) and an analog signal output (104). Each of the input nodes corresponds to a different bit of a digital word that is to be converted to an analog signal. The current-controlled latch memory includes plural subcircuits (14 and 16). Each of the latch subcircuits uses an amount of current to store the logic state of the bit of the digital word and to derive directly the node of the R-2R resistive ladder network. This configuration promotes the efficient use of space, power, and circuit elements.


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