The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 20, 1987
Filed:
Oct. 23, 1985
Theo J Powell, Dallas, TX (US);
Yin-Chao Hwang, Sugar Land, TX (US);
Texas Instruments Incorporated, Dallas, TX (US);
Abstract
A modularized scanned logic test system includes modularized logic circuits (26) having control/observation locations therein. Each of the control/observation locations has a shift register latch (SRL) disposed thereat. A common scan data in line (28) provides data to a serial input to each of the modules (26). The serial output of each of the modules (26) is interfaced with a scan data out line (30). An address on a bus (16) is provided to a decoder (52) to select one of the modules (26). An isolation gate (48) allows for input of data to only the select one of the modules (26) and an isolation gate (50) allows output of data only from the select one of the modules (26) to the scan data out line (30).