The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 20, 1987

Filed:

Nov. 25, 1985
Applicant:
Inventors:

David W Bogardus, Beaverton, OR (US);

Robin L Teitzel, Portland, OR (US);

David D Chapman, Portland, OR (US);

Assignee:

Tektronix, Inc., Beaverton, OR (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G01R / ; G01R / ;
U.S. Cl.
CPC ...
324 / ; 3241 / ;
Abstract

A probe for a logic analyzer includes a replacement plug assembly comprising those portions of probe equipment which must be specifically adapted to accommodate a selected microprocessor, and a buffer probe assembly comprising those portions of probe equipment which are adapted for use with a wide variety of microprocessors. The replacement plug assembly and the buffer probe assembly are mechanically joined and electrically coupled by a square pin connector so that the replacement plug assembly may be removed from the probe and replaced with a differently configured replacement plug assembly when a different microprocessor is to be probed. Thus only a portion of the probe is changed to retarget the probe for different microprocessors. Each replacement plug assembly cross-connects data, address, and control lines of the associated microprocessor to the same corresponding groups of data, address, and control signal input channels of the buffer probe assembly as every other replacement plug assembly so that the data, address, and control information is transmitted to the data acquisition system through the buffer probe assembly over the same input line groups regardless of the microprocessor under test. This enables programmable data acquisition circuits of the logic analyzer to accommodate microprocessors having differing pin arrangements without a change in data acquisition circuit hardware or wiring.


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