The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 14, 1987

Filed:

Oct. 22, 1984
Applicant:
Inventors:

Cecil J Davis, Greenville, TX (US);

John E Spencer, Plano, TX (US);

Dan T Hockersmith, Garland, TX (US);

Randall C Hildenbrand, Richardson, TX (US);

Frederick W Brown, Colleyville, TX (US);

Stanford P Kohan, Garland, TX (US);

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L / ; B44C / ; C03C / ; C23F / ;
U.S. Cl.
CPC ...
156345 ; 156626 ;
Abstract

A plasma reactor for the manufacturing of semiconductor devices has powered loadlocks and a main process chamber where slices can be processed one slice at a time with pre-etch plasma treatments before the main etching processing and afterwards receive a post etch treatment. The system comprises powered loadlocks, a main chamber, vacuum pumps radio frequency power supplier, radio frequency matching networks, heat exchangers and throttle valve and pressure controllers, gas flow distribution and microprocessor controllers. The semiconductor wafers are automatically fed one at a time from storage cassettes through isolation gates with articulated mechanical arms to a powered entry loadlock for pre-etching processes. At the completion of the pre-etching processing, the semiconductor wafer is transferred to the main chamber automatically for the main etch process and then to the powered exit loadlock for post etch treatment and finally to an output cassette.


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