The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 07, 1987
Filed:
Aug. 03, 1984
Laurence C Brasfield, Mercer Island, WA (US);
Applied Microsystems Corporation, Redmond, WA (US);
Abstract
A first process is used to identify the second circuit to which the shorted circuit is connected. A low-level, A.C. potential is imposed between the node known to be shorted and a common trace. A high impedance probe is scanned over the circuits at a distance. The potential detected is filtered and compared with the impressed potential. The result is filtered, amplified, and synchronously demodulated and the result displayed. The second process is used to locate the site of the short. A low-level AC current is injected between two shorted traces. Points along the traces are contacted by a high impedance probe. The signal is filtered and compared with the impressed potential. The result of the comparison is further filtered, amplified, synchronously demodulated and the result displayed. A shorts locator is under the control of a central processing unit. Clips permit connection to the system under test. The clip potentials are monitored. A high impedence probe circuit which includes filtering and buffering circuitry, provides an output signal which compared to probe circuitry potentials. An excitation circuit provides and AC test signal applied by means of the clips. The probe and clip circuitry potentials are passed through a narrow bandpass amplifier. The resulting signal is demodulated by an intergrator which has synchronously reversed polarity. The output is passed through an analog to digital converter and passed to the central processor for processing and display.