The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 23, 1986
Filed:
Aug. 31, 1984
Yasuo Ikawa, Tokyo, JP;
Tadashi Shibata, Yokohama, JP;
Kiyoshi Urui, Yokohama, JP;
Misao Miyata, Tokyo, JP;
Masahiko Kawamura, Yokohama, JP;
Noboru Amano, Tokyo, JP;
Kabushiki Kaisha Toshiba, Kawasaki, JP;
Abstract
A programmable semiconductor integrated circuit device is disclosed, which includes different kinds of MSI scale function blocks formed on a substrate. First wiring lines extending in a row direction are connected to input terminals of the function blocks, respectively. Second wiring lines are connected to output terminals of the function blocks, respectively. The second wirings are T-shaped and have respective line components extending in a column direction, with the first wiring lines. Floating gate type field effect transistors are provided, in a matrix manner, at mutually electrically insulated crossing points among the first and second lines. The electrical state of the switching transistors can be set independently and changeably, under the control of row and column decoders, to specify a desired wiring pattern of the function blocks by having the shortest signal transmission paths of the first and second wiring lines through the hardware as in the case of a custom LSI, thereby realizing the desired custom-made LSI.