Phase-lock loop including integrated circuit voltage controlled

Abstract

A voltage controlled oscillator (VCO) is described which comprises a plurality of inverter stages of odd number connected in a ring with the output of each stage connected to the input of the next stage via a voltage controlled impedance provided by the transconductance of pass transistors. In one embodiment, this VCO is incorporated into a Phase-Lock Loop circuit, in which the gates of the pass transistors are connected to a control circuit which provides a variable biasing voltage to the gates inresponse to speed-up or slow-down signals provided by a phase detector. The bias on the gates adjusts the frequency of the voltage controlled oscillator, in accordance with the speed-up or slow-down signal. The phase detector is coupled to a stream of input data pulses and to a reference train of clock pulses provided by the voltage controlled oscillator. The phase detector determines whether the frequency of the clock pulses are faster or slower than the frequency of the data pulses and produces either a speed-up signal or a slow-down signal, depending upon the relative speed. These slow-down and speed-up signals are fed to control means responsive to the signals to increase or decrease the bias voltage applied to the gates of the pass transistors.