The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 11, 1986
Filed:
Dec. 28, 1984
Fujitsu Limited, Kawasaki, JP;
Abstract
An automatic IC mounting process for mounting a plurality of ICs on an upper surface of a printed circuit board in accordance with a predetermined sequence program. Each of the ICs has a plurality of leads, each of which is to be inserted into a predetermined corresponding through-hole of the printed circuit board. The process includes: (i) a step for inserting the leads of an IC into the through-holes of the printed circuit board; (ii) a step for detecting whether or not each lead of the IC is correctly inserted into the corresponding through-hole after every step (i); (iii) a step for removing a misinserted IC having a misinserted lead from the printed circuit board and discarding the misinserted IC into a predetermined reject place immediately after a misinsertion is detected in the step (ii); (iv) a step for memorizing the information for identifying the misinserted IC; (v) a step for mounting a predetermined number of subsequent ICs on the printed circuit board in accordance with the predetermined sequence program, leaving the position of the misinserted IC unmounted; (vi) a step for searching for whether or not the information was memorized in the step (iv); and, (vii) a step for preparing a new IC identified by that information and remounting it on the printed circuit board at the position of the misinserted IC.