The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 05, 1986
Filed:
Jan. 24, 1985
Siemens Aktiengesellschaft, Berlin & Munich, DE;
Abstract
A method for the manufacture of a large scale integration (LSI) MOS field effect transistor wherein a gate electrode is generated on a doped silicon substrate, source/drain regions are formed by ion implantation using the gate electrode as an implantation mask and the source/drain regions are shielded by means of an oxide layer extending to the sidewalls of the gate electrode so that the diffusion of the implanted source/drain regions under the gate electrode area are reduced. The specific improvement of the present invention involves applying a readily flowable silicate glass layer as a gate edge masking for the source/drain ion implantation after formation of the gate electrode, the silicate glass layer being applied by deposition from the vapor phase at a thickness such that the dopant ions in the subsequent source/drain ion implantation are still implanted into the zone near the surface under the silicate glass layer but ion implantation into the zones at the edges of the gate is suppressed.