The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 22, 1986

Filed:

Jun. 24, 1985
Applicant:
Inventors:

John R Abernathey, Jericho, VT (US);

Jerome B Lasky, Essex Junction, VT (US);

Larry A Nesbit, Williston, VT (US);

Thomas O Sedgwick, Briarcliff Manor, NY (US);

Scott Stiffler, Cortland, NY (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L / ; B44C / ; C03C / ; C03C / ;
U.S. Cl.
CPC ...
156628 ; 2957 / ; 2957 / ; 148-15 ; 148175 ; 156630 ; 156633 ; 156643 ; 156646 ; 156645 ; 156657 ; 156662 ; 2041 / ; 2041 / ; 252 791 ; 252 793 ; 252 795 ; 427 85 ; 427 86 ;
Abstract

A method of forming a thin silicon layer upon which semiconductor devices may be constructed. An epitaxial layer is grown on a silicon substrate, and oxygen or nitrogen ions are implanted into the epitaxial layer in order to form a buried etch-stop layer therein. An oxide layer is grown on the epitaxial layer, and is used to form a bond to a mechanical support wafer. The silicon substrate is removed using grinding and/or HNA, the upper portions of the epitaxy are removed using EDP, EPP or KOH, and the etch-stop is removed using a non-selective etch. The remaining portions of the epitaxy forms the thin silicon layer. Due to the uniformity of the implanted ions, the thin silicon layer has a very uniform thickness.


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