The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 04, 1986

Filed:

May. 22, 1984
Applicant:
Inventors:

Robert C Fang, Cupertino, CA (US);

Jerry S Wang, Cupertino, CA (US);

Assignee:

Data General Corporation, Westboro, MA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L / ;
U.S. Cl.
CPC ...
29571 ; 2957 / ; 29578 ; 148187 ;
Abstract

A method of forming CMOS transistors with self-aligned field regions comprising the steps of providing on a silicon substrate first and second spaced apart areas for said CMOS transistors followed by forming a masking member on said substrate protecting the first of said areas and exposing the second. The second area is doped with a p-type material after which the size of the unmasked area is increased to that defining a p-well region to be formed therein surrounding said second area. Once the p-well region is formed, the same mask is employed to dope the p-well region with additional p-type material after which the CMOS transistors are fabricated in said first and second spaced apart areas.


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