The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 19, 1985

Filed:

Jan. 30, 1984
Applicant:
Inventors:

Sing Y Wong, Sunnyvale, CA (US);

John M Birkner, Sunnyvale, CA (US);

Assignee:

Monolithic Memories, Inc., Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K / ;
U.S. Cl.
CPC ...
364716 ; 307465 ; 34082583 ;
Abstract

A programmable array logic circuit is provided having a programmable AND gate array and having means for connecting individual AND gate outputs to the input of one or the other of a pair of neighboring OR gates. This allows the product terms to be shared between two outputs.


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