The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 19, 1985

Filed:

Mar. 23, 1983
Applicant:
Inventor:

Ronald M Jackson, Portland, OR (US);

Assignee:

Tektronix, Inc., Beaverton, OR (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F / ;
U.S. Cl.
CPC ...
340747 ; 340721 ; 340744 ;
Abstract

Apparatus for displaying a logic timing diagram on a raster scan type display device is disclosed. A logic signal is sampled and representations thereof stored in a RAM. The RAM contents are read repeatedly in synchronism with a raster scan operation, and the read-out signal is delayed by a predetermined time which is shorter than one bit cycle of the read-out signal. Logical gating functions, OR, exclusive-OR and NAND gates, receive the delayed and undelayed signals, and provide output signals from which the display of the 'High' level, edges and 'Low' level of the logic timing diagram are derived. Since it is not necessary to convert the logic signal to display codes and rewrite a display RAM, high speed scrolling and magnification can be obtained quickly and easily.


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