The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 24, 1985
Filed:
Jun. 22, 1983
Tadashi Shibata, Yokohama, JP;
Tokyo Shibaura Denki Kabushiki Kaisha, Kawasaki, JP;
Abstract
A method to prevent dielectric breakdown of a thin gate insulating film of a memory cell capacitor of a dynamic semiconductor memory device such as a dynamic random access memory during fabrication of the memory. A diffusion layer of an n-conductivity type is formed on a predetermined surface region of a semiconductor substrate of a p-conductivity type so as to form a p-n junction. Then, there is formed a polycrystalline semiconductor layer which corresponds to a gate electrode and which is connected to the thin gate insulating film and partially contacts the diffusion layer. Thus the polycrystalline semiconductor layer is electrically connected to the substrate through a diode region which is formed of the p-n junction. The polycrystalline semiconductor layer is then etched in a reactive ion etching step, and any abnormal charges stored in the thin gate insulation layer during the reactive etching step are immediately discharged to the substrate.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile