The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 05, 1985

Filed:

Oct. 28, 1983
Applicant:
Inventors:

Hans-Joachim Trumpp, Stuttgart, DE;

Johann Greschner, Pliezhausen, DE;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L / ; B44C / ; C03C / ; B29C / ;
U.S. Cl.
CPC ...
156643 ; 2957 / ; 29580 ; 156646 ; 156648 ; 156653 ; 156655 ; 156657 ; 1566591 ; 156662 ; 156668 ; 2041 / ; 2041 / ; 357 49 ; 427 93 ;
Abstract

Following the method of making structures with dimensions in the submicrometer range, structures of a polymeric layer with horizontal and substantially vertical surfaces are first made on a substrate. Thereupon, a silicon nitride or oxide layer is plasma deposited. This layer is subjected to reactive ion etching methods in such a manner that its horizontal regions and the polymeric structures are removed, with merely the narrow regions of the silicon nitride or oxide layer that had originally been arranged adjacent the vertical surfaces of the polymeric structures remaining. In the case of positive lithography, the silicon nitride or oxide walls are converted into a mask with the same dimensions but consisting of a different mask material. In the case of negative lithography the silicon nitride or oxide walls are converted in a mask reversal process into openings in a mask material layer through which by means of reactive ion etching vertical trenches approximately 0.5 .mu.m deep can be etched in the silicon substrate. The trenches are filled by thermal oxidation or with a synthetic material as e.g. polyimide. The method as disclosed by the invention can also be applied to other processes than recessed isolation in semiconductor technology.


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