Small area high value resistor with greatly reduced parasitic capacitance

Abstract

The invention provides a unique sub-micron dimensioned resistor and methods of making the same, wherein hundreds of such resistors may be fabricated on a single chip with each comprising an active region surrounded by field oxide completely isolating it from the substrate and its effects on operation. Spaced apart slots made in the substrate permit the introduction of orientation dependent etching fluid therein to at least substantially etch semi-arrays of active regions of the substrate away from the substrate except for spaced apart supports therealong. Oxidation serves to support the semi-arrays and subsequent steps directly from the substrate or by webs of oxidation along the tops of the semi-arrays connected to the substrate. The support is necessary while orthogonal slots are provided permitting access to opposed sides of the active regions for doping from each end, which doping is driven in from both sides to provide a resistor active region to which electrical connections are applied using conventional techniques providing almost complete reduction of the parasitic capacitances because of the total oxide isolation of the active regions from the substrate. The resistors may also be made by forming intersecting slots in spaced apart relation across the substrate to define semi-arrays of V shaped intermediate regions which will become resistors. Silicon oxide fills these slots and separates the resistor regions from the substrate. Orthogonal slots divide the semi-arrays into individual resistor active regions which are optionally doped by one of N or P doping introduced into each active regions via the orthogonal slots and driven in to comprise the resistors.