The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 22, 1985

Filed:

Mar. 31, 1983
Applicant:
Inventors:

George K Celler, New Providence, NJ (US);

David J Lischner, Salisbury, PA (US);

McDonald Robinson, Chester, NJ (US);

Assignee:

AT&T Bell Laboratories, Murray Hill, NJ (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L / ;
U.S. Cl.
CPC ...
2957 / ; 357 49 ;
Abstract

Structures useful for dielectrically isolated high voltage devices are produced utilizing a melting technique. In this technique a cavity is produced in a silicon wafer, the surface of the cavity is, for example, oxidized to form a dielectric material, and silicon is deposited onto the dielectric material so that it extends to a region where it is in contact with single crystal silicon, e.g., a portion of the wafer. The entire region of polycrystalline silicon is then melted. Upon termination of the melting energy, the polycrystalline silicon is converted into a thick region of dielectrically isolated single crystal silicon. This thick region is useful for the formation of high voltage devices.


Find Patent Forward Citations

Celler, George. (1985). Method of making dielectrically isolated silicon devices (U.S. Patent No. 4494303). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/4494303

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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