The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 08, 1985
Filed:
Feb. 22, 1982
Isao Yoshida, Nishitama, JP;
Takeaki Okabe, Nishitama, JP;
Mineo Katsueda, Hachioji, JP;
Minoru Nagata, Kodaira, JP;
Toshiaki Masuhara, Nishitama, JP;
Kazutoshi Ashikawa, Takasaki, JP;
Hideaki Kato, Takasaki, JP;
Mitsuo Ito, Gunma, JP;
Shigeo Ohtaka, Takasaki, JP;
Osamu Minato, Kodaira, JP;
Yoshio Sakai, Hachioji, JP;
Hitachi, Ltd., Tokyo, JP;
Abstract
A semiconductor integrated circuit device is provided to include a vertical type MOSFET and a gate protection element for the MOSFET. The vertical type MOSFET is made up of a silicon layer of n-type conductivity formed on an n.sup.+ -type silicon substrate, a base region of p-type conductivity formed in the surface of the silicon layer of n-type conductivity, an n.sup.+ -type source region provided in the base region, and a gate electrode formed on a portion of the base region through a gate insulating film. The silicon substrate serves as the drain. The gate protection element is formed of a polycrystalline silicon layer which is provided on the base region through an insulating film and includes at least one pn junction. By virtue of forming the gate protection element over the base region rather than directly over the substrate, a more stable operation is achieved.