The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 06, 1984
Filed:
May. 06, 1982
Glenn J Gombert, Hillsboro, OR (US);
Steven R Palmquist, Beaverton, OR (US);
Tektronix, Inc., Beaverton, OR (US);
Abstract
An input apparatus for a logic analyzer is disclosed which receives a plurality of logic signals from a probe, the plurality of logic signals being received at different points in time, the input apparatus being capable of generating a corresponding plurality of logic signals in response thereto, the time of generation of the corresponding plurality of logic signals substantially coinciding with the time of generation of a corresponding reference logic signal. The input apparatus comprises a plurality of tapped delay lines corresponding to the plurality of received logic signals. A controller controls the amount of time delay for each delay line associated with each received logic signal. The controller continues this control function until the time of generation of the corresponding plurality of logic signals substantially coincides with the time of generation of the corresponding reference logic signal. The controller provides the control function by comparing the time of receipt of one of the plurality of logic signals with the time of receipt of a reference logic signal and controlling the amount of time delay of the associated delay line until the time of generation of the corresponding logic signal substantially coincides with the time of generation of the corresponding reference logic signal.
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