The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 30, 1984
Filed:
Jun. 09, 1982
Yoshihisa Mizutani, Tokyo, JP;
Shinichiro Takasu, Tokyo, JP;
Tokyo Shibaura Denki Kabushiki Kaisha, Kawasaki, JP;
Abstract
A method for fabricating a three-dimensional multi-layer integrated circuit of single crystalline CeO.sub.2 and Si is proposed. This method is characterized in that a single crystalline CeO.sub.2 insulation layer, or the like, is formed on a single crystalline Si substrate. An isolation region is formed in the single crystalline Si substrate. The region is transformed into a SiO.sub.2 insulation layer by selectively introducing oxygen ions through the single crystalline CeO.sub.2 insulation layer and reacting the oxygen ions with the single crystalline Si. An epitaxial growth single crystalline Si layer is formed on the single crystalline CeO.sub.2 insulation layer. Predetermined processes, such as forming a single crystalline CeO.sub.2 layer, are performed thereafter to form the three-dimensional structures of semiconductor elements such as MOS transistors and bipolar transistors with high packing density and reliability.