Extended address, single and multiple bit microprocessor

Abstract

The addressable memory space within the retrievable capacity of the microprocessor is necessarily limited by the bit length of the address word. This in turn, is limited by the bit length of the word which the microprocessor may compute or manipulate. By appropriate organization of multiple registers, an extended or expanded memory space may be achieved without the necessity of increasing the word length of the digital information manipulated by the microprocessor. In addition, the microprocessor can be fabricated to be capable of both eight bit and sixteen bit operation by appropriate organization and coordination of a plurality of register files. By virtue of this register file organization and coordination additional improved operations may be achieved, such as direct coupling by the microprocessor between the memory and separate dedicated data processing chips, simplified string instructions and the condensation of entire classes of instructions into single generic instruction formats.