The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 13, 1984
Filed:
Jul. 29, 1981
Wei-Ti Liu, San Jose, CA (US);
Douglas J Lee, Santa Clara, CA (US);
Intel Corporation, Santa Clara, CA (US);
Abstract
An MOS buffer is described which converts TTL level signals to MOS level signals. An inverter which receives the input TTL signal is coupled to ground through a reference voltage source. This source assures that the inverter does not conduct when the TTL level signal is in its lower state. The output of the inverter is coupled to a level shifter which assures that the output of the inverter is shifted downward when the TTL signal is in its higher state. The transistors in the buffer may have short channels unlike prior art circuits.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile