Method of producing a monolithically integrated two-transistor memory

Abstract

A method of producing a monolithically integrated two-transistor memory cell, including a silicon crystal for accommodating the memory cell, a first MOS field effect transistor having a current-carrying channel and both a control gate and a floating gate disposed between the control gate and surface of the crystal, a second MOS field effect transistor having a current-carrying channel and a control gate, an SiO.sub.2 film supporting the gates, a doped polycrystalline silicon layer deposited on the SiO.sub.2 film, the control gates and the floating gate being formed from the doped polycrystalline silicon layer, and an erase area for the floating gate, the improvement which includes covering a part of the silicon crystal intended for the memory cell with an SiO.sub.2 film, forming a part of the gate oxide of the first MOS field effect transistor, forming a window through the SiO.sub.2 film at a location intended for the erase area, re-oxidizing the exposed area of the surface of the crystal in the window and increasing the remaining areas of the SiO.sub.2 film, depositing a first doped polycrystalline silicon layer forming a base of the floating gate, covering the polycrystalline silicon layer with another SiO.sub.2 film, depositing a second doped polycrystalline silicon layer, and forming the control gate of the first MOS field effect transistor from the second doped polycrystalline silicon layer and producing the source and drain zone of the two MOS field effect transistors.